1. Field of the Invention
The present invention relates to an imaging apparatus configured to pick up an image of an object.
2. Description of the Related Art
In recent years, a conventional imaging apparatus such as a digital single-reflex camera and a video camera uses a complementary metal oxide semiconductor (CMOS) image sensor. A recent CMOS image sensor, similar to a charge-coupled device (CCD) image sensor, has a large number of pixels. Accordingly, a size of each pixel has become smaller as the number of pixels in a CMOS sensor increases, and thus an optical signal gets small. Therefore, it is highly necessary to reduce or suppress a noise, so that a signal to noise (S/N) ratio does not become worse.
Now, related art will be described below. FIG. 8 illustrates a circuit 60 for one pixel of a CMOS image sensor. In FIG. 8, a photo diode (PD) 61 receives an optical image formed by a photographing lens (not illustrated), generates electrical charge, and accumulates the generated electrical charge. A transfer switch (hereinafter referred to as a “TX”) 62 is formed by a metal oxide semiconductor (MOS) transistor. A floating diffusion (FD) 64 is a capacitor. The TX 62 transfers the electrical charge accumulated in the PD 61 to the FD 64. The FD 64 converts the transferred electrical charge into a voltage. The voltage is output from an amplifier 65 via a source follower. A row selection switch 66 sends a pixel output to a vertical output line 67. A reset switch 63 resets a potential in the FD 64.
FIG. 9 illustrates a layout of the entire CMOS image sensor. A CMOS image sensor has optical black areas (OB areas) 71 and 72 in its peripheral portions. Each of the OB areas 71 and 72 is formed by an light-shielded pixel. The OB area 72 is a vertical OB area (or a horizontal OB area). The OB area 72, formed by an light-shielded pixel as described above, is used for detecting a black level and for correcting an offset variation of an output caused due to a dark current component or a temperature variation in the CMOS image sensor. The OB area 71 is a horizontal OB area (or a vertical OB area). The OB area 71, also formed by an light-shielded pixel similar to the vertical OB area, is used for correcting a dark shading component in a vertical direction.
A dark shading component can appear due to a dark current shading. However, as a characteristic of a CMOS image sensor, a dark shading component can appear due to a voltage shading that is caused by an impedance on a power line of the CMOS image sensor. In an ordinary case, dark shading correction in the vertical direction is performed on a gentle slope. In addition, a dark shading correction in the vertical direction is performed with a low pass filter on a pixel output from each of a plurality of rows, in order to prevent a defective pixel from causing a defective line.
An image captured via a photographing lens (not illustrated) is formed on an effective pixel area 73. A signal-to-noise (S-N) circuit 75 differentiates a noise signal (N signal) from a signal output from the PD 61 (S signal). The S-N circuit 75 removes a inherent noise component that arises in a CMOS image sensor. With the S-N circuit 75, which removes a noise component as described above, a CMOS image sensor can obtain an S/N ratio at a level equal to a CCD image sensor.
The S-N circuit 75 holds a signal component S and a noise component N for each pixel output on a row selected by the row selection switch 66. Then, the S-N circuit 75 subtracts, with respect to each pixel, the noise component N from the signal component S, using an output amplifier 74. Thus, a pixel signal with no noise component can be output.
A noise component is held as follows. In a state where the TX 62 is OFF, the FD 64 is reset by the reset switch 63 (see FIG. 8) with a pulse. Then, a resulting signal is held in the S-N circuit 75 as an N signal via the amplifier 65, the row selection switch 66, and the vertical output line 67. A noise component can be a reset noise in the FD 64 and a noise occurring due to an inter-pixel unevenness of a voltage between gate sources of the amplifier 65.
A signal component is held as follows. A potential in the PD 61 is converted into a voltage by the FD 64 by turning ON the TX 62 with a pulse. Then, a resulting signal is held in the S-N circuit 75 as an S signal, as in the case of the noise component. The S signal is added to the noise component obtained by resetting the FD 64.
A noise component can be cancelled by subtracting an N signal from an S signal at the time of reading a signal with the output amplifier 74. Then, a correction is performed in order to match a black level of the signal output from the output amplifier 74 with a reference black level. Subsequently, an offset in the horizontal OB area (a difference between the black level in the horizontal OB area and the reference black level) is subtracted. Thus, a high frequency noise can be suppressed. The above-described conventional method is discussed in Japanese Patent Application Laid-Open No. 2006-191449.
However, even if an offset in a horizontal OB area is subtracted as described above, a horizontal noise cannot be cancelled. When a noise source is placed on a power source, a power line of an image sensor or a substrate of an image sensor itself vibrates. More specifically, a signal output from a pixel is affected by a capacity coupling with a substrate of the image sensor and wiring around the image sensor on a grounding side of the FD 64 (FIG. 8). Accordingly, the OB area that is light-shielded and the effective pixel that is not light-shielded are affected differently.
FIG. 10 is a cross section of a CMOS image sensor. Referring to FIG. 10, each of pixels 1 and 2 is an OB pixel light-shielded by AL3, while pixels 3 and 4 are not light-shielded by AL3. Each of pixels 3 and 4 is not light-shielded, therefore, is an effective pixel. A micro lens (ML) effectively condenses light into the PD 61 through a color filter(CF). The CMOS image sensor further includes wiring layers AL1 to AL3. The wiring layer AL3 also serves to optically shield light. A TX, an FD, and a PD in FIG. 10 are similar to the TX 62, the FD 64, and the FD 64 in FIG. 8. The wiring layer AL3 is more widely provided for a pixel in the OB area than for the effective pixel area. Thus, the capacity coupling with the FD differently affects the pixel in the OB area compared to the effective pixel area.
The degree of susceptibility of the effective pixel area to the noise from the power source or other noises is about 0.4 to 0.8 times that of an OB area according to an experiment. The degree of susceptibility to a noise varies according to the layout of the components of the CMOS image sensor. That is, in the case where the offset in the OB area is subtracted as it is as described above, the noise is overcorrected. Thus, it appears that the horizontal noise cannot be effectively cancelled.
FIGS. 4A through 4C are graphs respectively illustrating a level of offset. In each of FIGS. 4A through 4C, a vertical position on the image sensor is taken on a vertical axis. The offset level of the OB area of an image sensor from a black level is taken on a horizontal axis.
FIG. 4B illustrates a dark shading of an output of an effective pixel area in a vertical (V) direction, in a state where light is not applied. A portion indicating a gently variation corresponds to the dark shading caused by a circuit impedance. A portion indicating a fine variation corresponds to the dark shading caused by the noise from the power source superposed on the FD 64 of the pixel. The noise from the power source is canceled by a horizontal OB clamping of an analog front end (AFE) 2 (FIG. 1), as illustrated in FIG. 4C.
FIG. 4A illustrates dark shading in the V direction of the image sensor. In FIG. 4A, a full-line curve indicates dark shading in the same effective pixel area as that in FIG. 4B, and a broken-line curve indicates dark shading in the OB area. A gentle variation portion of shading is similar between the OB area and the effective pixel area. However, amplitude in a portion of the curve indicating a fine variation is greater in the OB area than in the effective pixel area.
Next, a second related art will be described below. FIG. 11 illustrates an exemplary layout of an entire multi-channel CMOS image sensor. Unitary pixels described above with reference to FIG. 8 (pixel 60(1-1) through pixel 60(n-m)) are arranged on a matrix. An accumulation of each pixel is controlled according to a signal (a TX 62 control signal φTX, a reset switch 63 control signal φRES, and a row selection switch 66 control signal φSEL) output from a vertical scanning circuit 77.
The vertical output line 67 (67(1) through 67(m)) is connected in common to each vertical pixel. Furthermore, the vertical output line 67 is connected to the S-N circuit 75 (S-N circuits 75(1) through 75(m)) that differentiates a noise signal, from a photoelectric conversion signal from a pixel, per line. A horizontal scanning circuit 76 (76a through 76b) performs control such as selection of an output from the S-N circuit 75 (S-N circuits 75(1) through 75(m)).
The output from the S-N circuit 75 (S-N circuits 75(1) through 75(m)) is then output to a subsequent processing circuit (e.g., an AFE (not illustrated)) via the output amplifier 74 (output amplifiers 74-1 through 74-4).
The CMOS image sensor illustrated in FIG. 11 includes four output amplifiers 74 to simultaneously perform noise correction processing on a plurality of horizontal pixels (in the example in FIG. 11, four pixels), in order to correspond to image taking processing by the imaging apparatus performed at a high speed. Each output amplifier 74 outputs a pixel output separately to each output path. Furthermore, in order to achieve an effective layout of the CMOS image sensor having the above-described configuration, the pixel output is routed via the vertical output line 67, the S-N circuit 75, and the output amplifier 74. Moreover, an output line for odd-numbered column pixels (e.g., pixels in a first column and a third column) of the plurality of horizontal pixels is arranged in an upper portion of the CMOS image sensor. An output line for even-numbered column pixels (e.g., pixels in a second column and a fourth column) of the plurality of horizontal pixels is arranged in a lower portion of the CMOS image sensor.
That is, with respect to a signal output path of the CMOS image sensor, an odd-numbered pixel output is routed via an output path including an S-N circuit block 75a and an output amplifier block 74a in the upper portion of the CMOS image sensor. An even-numbered pixel output is routed via an output path including an S-N circuit block 75b and an output amplifier block 74b in the lower portion of the CMOS image sensor.
As described above, the S-N circuit 75 cancels an inherent noise occurring in a CMOS image sensor to achieve an S/N ratio at a level similar to a CCD image sensor. Further, The S-N circuit 75 holds a signal component S and a noise component N for each pixel output on a row selected by the row selection switch 66. Then, the S-N circuit 75 subtracts the noise component N from the signal component S with respect to each pixel, using the output amplifier 74. Thus, a pixel signal with no noise can be output.
Here, a noise component is obtained in the following manner. In a state where the TX 62 is OFF, the FD 64 is reset by the reset switch 63 with a pulse. Then, a resulting signal is held in the S-N circuit 75 as an N signal via the amplifier 65, the row selection switch 66, and the vertical output line 67. A noise component includes a reset noise in the FD 64 and a noise occurring due to an inter-pixel unevenness of a voltage between gate sources of the amplifier 65.
A signal component is obtained in the following manner. A potential in the PD 61 is converted into a voltage by the FD 64 by turning ON the TX 62 with a pulse. Then, a resulting signal is held in the S-N circuit 75 as an S signal, as in the case of the noise component. The S signal is added to the noise component obtained by resetting the FD 64.
A noise component can be cancelled by subtracting an N signal from an S signal at the time of reading a signal with the output amplifier 74, as discussed in Japanese Patent Application Laid-Open No. 2004-134752. However, a multi-channel image sensor having a plurality of signal output paths has the following problem.
FIG. 12 illustrates an impedance in the case where a noise appears in a CMOS image sensor. The following is an example of a comparison result between adjacent pixels in the same row and different columns. In FIG. 12, a distance t1 from the pixel 60(1-1) to the S-N circuit 75(1) via the vertical output line 67(1) is smaller than a distance t2 from the pixel 60(2-1) to the S-N circuit 75(2) via the vertical output line 67(2) (that is, t1<t2). Similarly, a distance t3 from the pixel 60(5-n) to the S-N circuit 75(1) via the vertical output line 67(5) is greater than a distance t4 from the pixel 60(6-n) to the S-N circuit 75(2) via the vertical output line 67(6) (that is, t3>t4).
As a signal output path becomes longer, an impedance (wiring resistance) necessarily becomes higher. Accordingly, an influence of an electrical variation caused by a noise become greater.
FIGS. 13A through 13C each illustrate shading occurring in the vertical direction per output path, where it is supposed that the entire surface of the CMOS image sensor evenly receives a noise of a predetermined frequency.
FIG. 13A illustrates shading data of the output amplifier block 74a disposed in the upper portion of the CMOS image sensor. Referring to FIG. 13A, the pixel in the upper portion of the CMOS image sensor, which is closer to the S-N circuit 75 (output stage), has a low impedance. Accordingly, a small variation occurs in the upper portion. The pixel in the lower portion of the CMOS image sensor, which is distant from the S-N circuit 75 (output stage), has higher impedance. The greater the distance between a pixel and the S-N circuit 75 (output stage), the greater the impedance. Accordingly, a great variation occurs in the lower portion.
On the other hand, FIG. 13B illustrates shading data of the output amplifier block 74b disposed in the lower portion of the CMOS image sensor. Referring to FIG. 13B, the pixel in the upper portion of the CMOS image sensor, which is distant from the S-N circuit 75 (output stage), has higher impedance. Accordingly, a great variation occurs in the upper portion. The pixel in the lower portion of the CMOS image sensor, which is closer to the S-N circuit 75 (output stage), has lower impedance. Here, the smaller the distance between a pixel and the S-N circuit 75 (output stage), the lower the impedance. Accordingly, a small variation occurs in the lower portion.
FIG. 13C illustrates shading data obtained according to an average value of pixel outputs from the output amplifier block 74a and the output amplifier block 74b (that is, data obtained according to an average value of outputs from a predetermined area, which is generally used for generating correction data). In this case, the outputs are averaged, and thus the effects from the noise are substantially even in the entire upper and lower portions of the CMOS image sensor. If a noise correction is performed based on the shading data in FIG. 13C, an uncorrected noise remains in the output from the output amplifier block 74a in the upper portion, and an uncorrected noise remains in the output from the output amplifier block 74b in the lower portion. Furthermore, a portion having less noise may be overcorrected.
That is, due to a difference in the distance from a position of a noise source and the difference in the length of the wiring of a CMOS image sensor, the impedance levels up to the output, of pixels in the same row, differ. As a result, the levels of noise differ in the different pixels in the same row. However, if all pixel outputs are corrected with the same correction value (correction data), a right amount of correction is not achieved. The correction amount can be too great or too small.